tsmc-a16

TSMC A16 is the platform where TSMC adopted the angstrom-based naming scheme and, more importantly, where it paired N2's nanosheet gate-all-around transistor with backside power delivery — two separate engineering decisions bundled into one node name. At a high level, how A16 builds on N2 looks like this:

A few things are worth knowing about why A16 is a specific combination of choices, not just "N2 with a new name":

A16's name marks a unit change, and its design marks an architecture addition. An angstrom is one tenth of a nanometer, so the "16" in A16 is TSMC adopting the same angstrom-based vocabulary used across the industry's newest roadmaps — a branding decision that by itself proves nothing about any feature's physical size. What A16 actually adds on top of N2's nanosheet transistor is backside power delivery, which moves power-rail wiring to the wafer's backside so it no longer competes with signal wiring for space on the front-side metal stack.

Backside power is an integration choice layered onto N2, not a requirement of the nanosheet gate. The same nanosheet transistor used on N2 can run with power delivered from the front side, as N2 itself does; A16 is the platform where TSMC specifically combines that transistor with the backside approach. This is also why comparisons across companies need care: Intel associates its own version of backside power, called PowerVia, with its 18A platform on a different timeline, and bundling "backside power" and "gate-all-around" into one undifferentiated claim obscures which company shipped which piece first.

A16's qualification timeline sits later than N2's because it carries N2's engineering risk plus a new one. TSMC's public material points to volume production for A16 arriving after N2's own Q4 2025 milestone, reflecting that A16 inherits every qualification step N2 required — new standard-cell libraries, new extraction models, a requalified PDK — and adds backside-power-specific verification on top. A roadmap date for A16 should be read as a target revisable against technical and business conditions, the same caution that applies to every TSMC node before its first customer shipment.

Whether backside power is worth adopting depends on the product, not the node name. Routing congestion relief from backside power benefits designs that are wiring-limited, but analog blocks, I/O, and some memory structures may see less benefit or added complexity from the backside approach. A real evaluation of an A16-based product needs its exact variant, voltage, and workload — the same discipline that already applies to distinguishing N3 from N3E, or N5 from N4.

Read TSMC A16 through a *stacked-decision* lens rather than a *nanometer* lens: A16 is N2's nanosheet transistor plus a backside-power integration choice, reported on its own qualification timeline — not a single physical measurement the name implies. A16's two-part design is the same underlying fact as N2's architecture shift and N5's pitch mismatch with other vendors: a TSMC process node is that company's platform, not a ruler the rest of the industry shares.