smic-7nm

SMIC 7nm names advanced logic technology attributed to Semiconductor Manufacturing International Corporation through independent reverse-engineering teardowns, not through SMIC's own published process disclosures — TechInsights has attributed two separate commercial chips to it: the MinerVa Bitcoin mining ASIC to an N+1 generation, and HiSilicon's Kirin 9000S mobile SoC to an N+2 generation built without EUV lithography. These are lab findings about specific sampled dies, not a universal process recipe or a disclosure from SMIC itself. How that attribution gets established looks like this:

A few things are worth knowing about why a teardown attribution and SMIC's own disclosure are different kinds of evidence:

MinerVa and Kirin 9000S are two separately attributed implementations — N+1 and N+2 respectively — and a finding about one doesn't establish identical readiness for a different, more complex product class. A mining ASIC has fundamentally different logic and interface demands from a general-purpose processor or a complex mobile SoC; TechInsights' MinerVa analysis compared its structures with other 7nm technologies and identified it as N+1, while its separate Kirin 9000S analysis identified N+2 FinFET high-k metal-gate structures without EUV — two distinct findings about two distinct products, not one blanket claim about "SMIC 7nm."

Reaching a 7nm-class feature size without EUV lithography requires different integration choices than an EUV-based approach, and those choices have their own cost and yield consequences that the node label alone doesn't reveal. Dense logic can be patterned with combinations of optical exposure, decomposition, spacers, and etching — TechInsights' process-flow description for Kirin 9000S states the N+2 implementation didn't use EUV, which means the complete result depends on overlay, defects, cycle time, and device variability from that specific integration sequence, not on the "7nm" label by itself.

A physical teardown establishes facts about the analyzed sample; it doesn't by itself establish sustained manufacturing capability at industrial scale. Wafer volume, yield learning, reliability, customer qualification, materials availability, and equipment support are all separate facts requiring their own evidence — SMIC's 7nm-class implementations are best discussed through named chips, attributed structural analysis, and explicitly dated commercial milestones, not assumptions drawn solely from the process-generation label.

Sources: [TechInsights MinerVa process comparison](https://www.techinsights.com/blog/smic-7nm-truly-7nm-technology-how-it-compares-tsmc-7nm); [TechInsights Kirin 9000S process analysis](https://www.techinsights.com/blog/hisilicon-kirin-9000s-smic-7nm-n2-process-flow-full-analysis).

Read SMIC 7nm as an attributed process family established through independent teardown analysis of specific products — MinerVa (N+1) and Kirin 9000S (N+2, no EUV) — not as a disclosure from SMIC itself, and not as evidence of industrial-scale manufacturing capability beyond what each specific teardown actually demonstrated.