quad-core

A quad-core processor provides four physical cores. Those cores may be organized within one die or across multiple dies in a package. The term establishes core count rather than a specific cache layout, interconnect, or instruction set. A complete description identifies the implementation and its software-visible topology.

Four cores increase the opportunity for concurrent work. A system can schedule several independent tasks or use four workers within a parallel application. Dependencies and uneven work division can leave cores idle. Parallelism has to exist in the workload and be expressed through software before the hardware can exploit it.

Serial work limits ideal speedup even before overhead. For an illustrative workload that is 25 percent serial and 75 percent perfectly divisible, four-core runtime is 0.25 + 0.75 / 4 = 0.4375 relative to one core. The corresponding speedup is about 2.29. This example holds per-core performance constant and excludes synchronization or memory costs.

Memory and communication become more important as concurrency grows. Four workers can compete for bandwidth or repeatedly invalidate shared cache lines. False sharing can create coherence traffic even when threads update different variables placed in the same line. Good data partitioning and locality can therefore matter as much as the amount of arithmetic assigned to each worker.

The package power envelope constrains simultaneous operation. Frequency and voltage policies respond to active-core count and thermal conditions, so peak single-core frequency does not specify sustained four-core performance. Historical multi-core development illustrates the shift toward throughput within power limits. A fair comparison measures the intended workload with its actual parallel execution behavior.

Sources and further reading. [National Research Council, The Future of Computing Performance, 2011](https://doi.org/10.17226/12980).

Read Quad-core processor as four execution engines whose useful scaling depends on workload division, locality, and simultaneous operating limits.