powervia

PowerVia is Intel's own brand name for its backside power delivery network, introduced alongside RibbonFET on Intel 20A and carried forward on Intel 18A, and the name identifies Intel's specific implementation — not the generic backside-power-delivery concept that TSMC and Samsung each implement under their own separate brand names. At a high level, how PowerVia reached a shipping product looks like this:

A few things are worth knowing about why PowerVia is Intel's own device, not a synonym for backside power delivery itself:

Backside power delivery is the architecture; PowerVia is Intel's specific implementation of it. As frontside copper wiring is asked to carry both signal routing and power distribution on the same side of the die, resistive voltage drop and routing congestion both get worse as the wiring shrinks — a problem every foundry pursuing sub-2nm-class logic has to solve. Moving the power grid to the wafer's backside and connecting it to the transistor through nano-scale through-silicon vias frees the frontside stack for signal routing alone, and PowerVia is simply Intel's name for the backside power network it built to do this, first disclosed alongside Intel 20A and carried into Intel 18A. TSMC's Super Power Rail, which TSMC has described targeting its A16 node, and Samsung's own backside power delivery network solve the identical interconnect problem with their own separately branded, separately qualified implementations.

PowerVia's debut on Intel 20A was bundled with RibbonFET, but the two are separate engineering decisions. Intel introduced its backside power network in the same node generation as its gate-all-around transistor, which meant requalifying standard-cell libraries and physical-verification rules for both changes at once — but a backside power grid doesn't require a gate-all-around transistor underneath it, and a gate-all-around transistor doesn't require backside power either; TSMC, for comparison, paired its own nanosheet gate with conventional frontside power on N2 before planning to introduce Super Power Rail later on A16.

PowerVia's nano-through-silicon-vias are the specific mechanism that distinguishes it from a simple backside metal layer. Connecting a backside power rail to a transistor's source and drain requires via structures that punch through the thinned wafer at a scale fine enough not to disturb the transistor above — Intel's PowerVia uses nano-TSVs sized for this purpose, and the equivalent via structure is the detail each company's implementation has to solve independently, since getting it wrong either damages the transistor or fails to make reliable contact.

Read PowerVia through a *brand-and-company* lens rather than a *generic-BSPDN* lens: what PowerVia names is specifically Intel's backside power delivery network, introduced with Intel 20A and carried through Intel 18A, paired with Intel's own RibbonFET. PowerVia's relationship to TSMC's Super Power Rail and Samsung's backside power delivery network is the same underlying fact as every other node name in this series: a backside-power brand name is that company's own platform, not a ruler the rest of the industry shares.